@inproceedings{2c64ad60db35455ebb7eff85695f7a98,
title = "Automatic methodology for placing the guard rings into chip layout to prevent latchup in CMOS IC's",
abstract = "A program methodology is proposed to automatically place the guard rings in the chip layout to improve latchup immunity of the CMOS IC's. The additional guard rings between the I/O cells and the internal circuits had been practically proven to significantly increase the latchup immunity of CMOS IC's. Therefore, the layout spacing from the I/O cells to the internal circuits can be reduced to a reasonable distance to save the total chip size. In this paper, a {"}Guard Ring Automation{"} program to realize the additional guard rings in the layout is proposed to make the layout more automatically and accurately.",
author = "Ming-Dou Ker and Jiang, {Hsin Chin} and Peng, {Jeng Jie} and Shieh, {Tzay Luen}",
year = "2001",
month = dec,
day = "1",
doi = "10.1109/ICECS.2001.957690",
language = "English",
isbn = "0780370570",
series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",
pages = "113--116",
booktitle = "ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems",
note = "8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001 ; Conference date: 02-09-2001 Through 05-09-2001",
}