跳至主導覽
跳至搜尋
跳過主要內容
國立陽明交通大學研發優勢分析平台 首頁
English
中文
首頁
人員
單位
研究成果
計畫
獎項
活動
貴重儀器
影響
按專業知識、姓名或所屬機構搜尋
Automated synthesis of discrete-time sigma-delta modulators from system architecture to circuit netlist
Shuenn Yuh Lee
*
, Chih Yuan Chen, Jia Hua Hong, Rong Guey Chang,
Po-Hung Lin
*
此作品的通信作者
智慧系統與應用研究所
研究成果
:
Article
›
同行評審
10
引文 斯高帕斯(Scopus)
總覽
指紋
指紋
深入研究「Automated synthesis of discrete-time sigma-delta modulators from system architecture to circuit netlist」主題。共同形成了獨特的指紋。
排序方式
重量
按字母排序
Keyphrases
System Architecture
100%
Delta-sigma Modulator
100%
Circuit Netlist
100%
Discrete-time
100%
Automated Synthesis
100%
Specification Synthesis
75%
Signal-to-noise-and-distortion Ratio
50%
Oversampling Technique
50%
Peak Signal to Noise Ratio
50%
Synthesis Tool
50%
Design Methodology
25%
Circuit Simulation
25%
SPICE Model
25%
Fully Differential
25%
Operational Amplifier
25%
Non-ideality
25%
Performance Prediction
25%
Third Order
25%
Fourth Order
25%
Design Flow
25%
Hybrid Design
25%
Simulation-based Approach
25%
CMOS Operational Amplifier
25%
Folded Cascode
25%
Equation-based
25%
Multiple Feedback
25%
Folded Cascode Op-amp
25%
Computer Science
sigma delta modulator
100%
discrete-time
100%
System Architecture
100%
Oversampling Ratio
50%
Synthesis Tool
50%
Operational Amplifier
50%
Experimental Result
25%
Circuit Simulation
25%
Engineering
Discrete Time
100%
Delta Modulator
100%
Operational Amplifier
50%
Peak Signal
50%
Experimental Result
25%
Simulation Result
25%
Circuit Simulation
25%
Feedforward
25%
Fourth Order
25%
Design Flow
25%
Performance Prediction
25%