TY - JOUR
T1 - Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction
AU - Chen, Wen Chieh
AU - Ker, Ming-Dou
N1 - Publisher Copyright:
© 2001-2011 IEEE.
PY - 2019/6
Y1 - 2019/6
N2 - A new on-chip transient detection circuit with superior area efficiency is proposed against the system malfunction resulting from system-level electrostatic discharge (ESD) events. With dual-latched structure, a better area efficiency can be achieved by the reduced time constant inquiry. The proposed transient detection circuit with a silicon area of 40 {\mu }\text{m}\,\,{\times }\,\,60\,\,{\mu }\text{m} has been fabricated in a 0.18-{\mu }\text{m} CMOS process with 1.8-V devices. The detection sensitivity has been successfully verified under ±200 V system-level ESD tests. To achieve the 'Class B' specification of IEC 61000-4-2 standard, the proposed transient detection circuit serves as a safety guard for the system. Through the hardware/firmware co-design, the auto-recovery procedure can be activated by the proposed transient detection circuit sending out a warning signal. With the proposed transient detection circuit co-works with the system program, the immunity level of microelectronic products against the electromagnetic compatibility (EMC) of ESD events can be effectively improved.
AB - A new on-chip transient detection circuit with superior area efficiency is proposed against the system malfunction resulting from system-level electrostatic discharge (ESD) events. With dual-latched structure, a better area efficiency can be achieved by the reduced time constant inquiry. The proposed transient detection circuit with a silicon area of 40 {\mu }\text{m}\,\,{\times }\,\,60\,\,{\mu }\text{m} has been fabricated in a 0.18-{\mu }\text{m} CMOS process with 1.8-V devices. The detection sensitivity has been successfully verified under ±200 V system-level ESD tests. To achieve the 'Class B' specification of IEC 61000-4-2 standard, the proposed transient detection circuit serves as a safety guard for the system. Through the hardware/firmware co-design, the auto-recovery procedure can be activated by the proposed transient detection circuit sending out a warning signal. With the proposed transient detection circuit co-works with the system program, the immunity level of microelectronic products against the electromagnetic compatibility (EMC) of ESD events can be effectively improved.
KW - Electrostatic discharge (ESD)
KW - electromagnetic compatibility (EMC)
KW - system-level ESD
KW - transient detection circuit
UR - http://www.scopus.com/inward/record.url?scp=85067130530&partnerID=8YFLogxK
U2 - 10.1109/TDMR.2019.2910351
DO - 10.1109/TDMR.2019.2910351
M3 - Article
AN - SCOPUS:85067130530
SN - 1530-4388
VL - 19
SP - 363
EP - 369
JO - IEEE Transactions on Device and Materials Reliability
JF - IEEE Transactions on Device and Materials Reliability
IS - 2
M1 - 8686205
ER -