Architecture exploration and delay minimization synthesis for set-based programmable gate arrays

Chia Cheng Wu, Kung Han Ho, Juinn-Dar Huang, Chun Yao Wang

研究成果: Conference contribution同行評審

指紋

深入研究「Architecture exploration and delay minimization synthesis for set-based programmable gate arrays」主題。共同形成了獨特的指紋。

Keyphrases

Computer Science

Engineering