Architecture design of full HD JPEG XR encoder for digital photography applications

Chia Ho Pan; Ching Yen Chien; Wei Min Chao; Sheng-Chieh Huang; Liang Gee Chen

doi:10.1109/TCE.2008.4637574

Architecture design of full HD JPEG XR encoder for digital photography applications

Chia Ho Pan^*, Ching Yen Chien, Wei Min Chao, Sheng-Chieh Huang, Liang Gee Chen

^*此作品的通信作者

電機工程學系

研究成果: Article › 同行評審

19 引文斯高帕斯（Scopus）

摘要

To satisfy the high quality image compression requirement, the new JPEG XR compression standard is introduced. The analysis and architecture design with VLSI architecture of JPEG XR encoder are proposed in this paper which can encode 4:4:4 1920 x 1080 high definition photo in smooth. According to the simulation results, the throughput of the proposed design can encode 44.2 M samples/sec. This design can be used for digital photography applications to achieve low computation, low storage, and high dynamical range features.

原文	American English
頁（從 - 到）	963-971
頁數	9
期刊	IEEE Transactions on Consumer Electronics
卷	54
發行號	3
DOIs	https://doi.org/10.1109/TCE.2008.4637574
出版狀態	Published - 2008

存取文件

10.1109/TCE.2008.4637574

其它文件與鏈接

Link to publication in Scopus

引用此

@article{8fbb2dcd51e14487bc0e3ffc9f9c0a0c,

title = "Architecture design of full HD JPEG XR encoder for digital photography applications",

abstract = "To satisfy the high quality image compression requirement, the new JPEG XR compression standard is introduced. The analysis and architecture design with VLSI architecture of JPEG XR encoder are proposed in this paper which can encode 4:4:4 1920 x 1080 high definition photo in smooth. According to the simulation results, the throughput of the proposed design can encode 44.2 M samples/sec. This design can be used for digital photography applications to achieve low computation, low storage, and high dynamical range features.",

keywords = "High definition photo, JPEG XR, Joint Photographic Experts Group (JPEG), VLSI architecture",

author = "Pan, {Chia Ho} and Chien, {Ching Yen} and Chao, {Wei Min} and Sheng-Chieh Huang and Chen, {Liang Gee}",

year = "2008",

doi = "10.1109/TCE.2008.4637574",

language = "American English",

volume = "54",

pages = "963--971",

journal = "IEEE Transactions on Consumer Electronics",

issn = "0098-3063",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

}

TY - JOUR

T1 - Architecture design of full HD JPEG XR encoder for digital photography applications

AU - Pan, Chia Ho

AU - Chien, Ching Yen

AU - Chao, Wei Min

AU - Huang, Sheng-Chieh

AU - Chen, Liang Gee

PY - 2008

Y1 - 2008

N2 - To satisfy the high quality image compression requirement, the new JPEG XR compression standard is introduced. The analysis and architecture design with VLSI architecture of JPEG XR encoder are proposed in this paper which can encode 4:4:4 1920 x 1080 high definition photo in smooth. According to the simulation results, the throughput of the proposed design can encode 44.2 M samples/sec. This design can be used for digital photography applications to achieve low computation, low storage, and high dynamical range features.

AB - To satisfy the high quality image compression requirement, the new JPEG XR compression standard is introduced. The analysis and architecture design with VLSI architecture of JPEG XR encoder are proposed in this paper which can encode 4:4:4 1920 x 1080 high definition photo in smooth. According to the simulation results, the throughput of the proposed design can encode 44.2 M samples/sec. This design can be used for digital photography applications to achieve low computation, low storage, and high dynamical range features.

KW - High definition photo

KW - JPEG XR

KW - Joint Photographic Experts Group (JPEG)

KW - VLSI architecture

UR - http://www.scopus.com/inward/record.url?scp=54349112181&partnerID=8YFLogxK

U2 - 10.1109/TCE.2008.4637574

DO - 10.1109/TCE.2008.4637574

M3 - Article

AN - SCOPUS:54349112181

SN - 0098-3063

VL - 54

SP - 963

EP - 971

JO - IEEE Transactions on Consumer Electronics

JF - IEEE Transactions on Consumer Electronics

IS - 3

ER -

Architecture design of full HD JPEG XR encoder for digital photography applications

摘要

存取文件

其它文件與鏈接

指紋

引用此