Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

I. Cheng Lin; Chih Yao Huang; Chuan Jane Chao; Ming-Dou Ker; Sung Yu Chuan; Len Yi Leu; Fu Chien Chiu; Jen Chou Tseng

doi:10.1109/IPFA.2002.1025615

Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

I. Cheng Lin, Chih Yao Huang, Chuan Jane Chao, Ming-Dou Ker, Sung Yu Chuan, Len Yi Leu, Fu Chien Chiu, Jen Chou Tseng

研究成果: Conference contribution › 同行評審

9 引文斯高帕斯（Scopus）

摘要

Latchup failure induced by ESD protection circuits occurred in a high-voltage IC product. Latchup occurred anomalously at only several output pins. All output pins have nearly identical layouts except the side output pin has a N-well resistor of RC gate-coupled PMOS beside. It was later found this N-well resistor is the main cause of inducing latchup.

原文	English
主出版物標題	Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002
編輯	Wai Kin Chim, John Thong, Wilson Tan, Kheng Chooi Lee
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	75-79
頁數	5
ISBN（電子）	0780374169
DOIs	https://doi.org/10.1109/IPFA.2002.1025615
出版狀態	Published - 1 1月 2002
事件	9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002 - Singapore, Singapore 持續時間: 12 7月 2002 → …

出版系列

名字	Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA
卷	2002-January

Conference

Conference	9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002
國家/地區	Singapore
城市	Singapore
期間	12/07/02 → …

存取文件

10.1109/IPFA.2002.1025615

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Link to publication in Scopus

引用此

Lin, I. C., Huang, C. Y., Chao, C. J., Ker, M-D., Chuan, S. Y., Leu, L. Y., Chiu, F. C., & Tseng, J. C. (2002). Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product. 於 W. K. Chim, J. Thong, W. Tan, & K. C. Lee (編輯), Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002 (頁 75-79). Article 1025615 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA; 卷 2002-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPFA.2002.1025615

Lin, I. Cheng ; Huang, Chih Yao ; Chao, Chuan Jane 等. / Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product. Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002. 編輯 / Wai Kin Chim ; John Thong ; Wilson Tan ; Kheng Chooi Lee. Institute of Electrical and Electronics Engineers Inc., 2002. 頁 75-79 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA).

@inproceedings{7027badaa7e046c3acd42598540003e2,

title = "Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product",

abstract = "Latchup failure induced by ESD protection circuits occurred in a high-voltage IC product. Latchup occurred anomalously at only several output pins. All output pins have nearly identical layouts except the side output pin has a N-well resistor of RC gate-coupled PMOS beside. It was later found this N-well resistor is the main cause of inducing latchup.",

keywords = "Breakdown voltage, Circuit testing, Clamps, CMOS integrated circuits, Electrostatic discharge, Pins, Power supplies, Protection, Resistors, Thyristors",

author = "Lin, {I. Cheng} and Huang, {Chih Yao} and Chao, {Chuan Jane} and Ming-Dou Ker and Chuan, {Sung Yu} and Leu, {Len Yi} and Chiu, {Fu Chien} and Tseng, {Jen Chou}",

year = "2002",

month = jan,

day = "1",

doi = "10.1109/IPFA.2002.1025615",

language = "English",

series = "Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "75--79",

editor = "Chim, {Wai Kin} and John Thong and Wilson Tan and Lee, {Kheng Chooi}",

booktitle = "Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002",

address = "United States",

note = "9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002 ; Conference date: 12-07-2002",

}

Lin, IC, Huang, CY, Chao, CJ, Ker, M-D, Chuan, SY, Leu, LY, Chiu, FC & Tseng, JC 2002, Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product. 於 WK Chim, J Thong, W Tan & KC Lee (編輯), Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002., 1025615, Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA, 卷 2002-January, Institute of Electrical and Electronics Engineers Inc., 頁 75-79, 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002, Singapore, Singapore, 12/07/02. https://doi.org/10.1109/IPFA.2002.1025615

Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product. / Lin, I. Cheng; Huang, Chih Yao; Chao, Chuan Jane 等.
Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002. 編輯 / Wai Kin Chim; John Thong; Wilson Tan; Kheng Chooi Lee. Institute of Electrical and Electronics Engineers Inc., 2002. p. 75-79 1025615 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA; 卷 2002-January).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

AU - Lin, I. Cheng

AU - Huang, Chih Yao

AU - Chao, Chuan Jane

AU - Ker, Ming-Dou

AU - Chuan, Sung Yu

AU - Leu, Len Yi

AU - Chiu, Fu Chien

AU - Tseng, Jen Chou

PY - 2002/1/1

Y1 - 2002/1/1

N2 - Latchup failure induced by ESD protection circuits occurred in a high-voltage IC product. Latchup occurred anomalously at only several output pins. All output pins have nearly identical layouts except the side output pin has a N-well resistor of RC gate-coupled PMOS beside. It was later found this N-well resistor is the main cause of inducing latchup.

AB - Latchup failure induced by ESD protection circuits occurred in a high-voltage IC product. Latchup occurred anomalously at only several output pins. All output pins have nearly identical layouts except the side output pin has a N-well resistor of RC gate-coupled PMOS beside. It was later found this N-well resistor is the main cause of inducing latchup.

KW - Breakdown voltage

KW - Circuit testing

KW - Clamps

KW - CMOS integrated circuits

KW - Electrostatic discharge

KW - Pins

KW - Power supplies

KW - Protection

KW - Resistors

KW - Thyristors

UR - http://www.scopus.com/inward/record.url?scp=84948770314&partnerID=8YFLogxK

U2 - 10.1109/IPFA.2002.1025615

DO - 10.1109/IPFA.2002.1025615

M3 - Conference contribution

AN - SCOPUS:84948770314

T3 - Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

SP - 75

EP - 79

BT - Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002

A2 - Chim, Wai Kin

A2 - Thong, John

A2 - Tan, Wilson

A2 - Lee, Kheng Chooi

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002

Y2 - 12 July 2002

ER -

Lin IC, Huang CY, Chao CJ, Ker M-D, Chuan SY, Leu LY 等. Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product. 於 Chim WK, Thong J, Tan W, Lee KC, 編輯, Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 75-79. 1025615. (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA). doi: 10.1109/IPFA.2002.1025615

Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

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