In this work, our study comprises of design and investigation on negative capacitance (NC), metal-oxide-semiconductor (MOS) field effects transistors (MOSFETs) with spacer and source/drain (S/D) overlap engineering. The scope of the work is to boost the performance and high-energy efficiency of the studied NC-MOSFETs by using the ferro electric material (FE). The NC-MOSFETs with the spacer technology can achieve the admirable Ion/Ioff ratio and subthreshold swing (SS), compared with planar MOSFETs. It makes device scaling possible by eliminating the short channel effect (SCE). We further estimated the effect of FE thickness and spacer, which are another critical parameter of obtaining better electrical characteristics and reducing SS.