Analysis and modeling of capacitances in halo-implanted MOSFETs

Chetan Gupta, Harshit Agarwal, Sagnik Dey, Chen-Ming Hu, Yogesh S. Chauhan

研究成果: Conference contribution同行評審

7 引文 斯高帕斯(Scopus)

摘要

In this paper, we report the anomalous behavior of capacitances in halo channel MOSFET for the linear and saturation regions. Unlike MOSFETs these devices have different threshold voltage (VTH) for the DC and CV operations, and therefore cannot be modeled by conventional methods. We have investigated various cases of doping non-uniformity: Source side halo (SH), Drain side halo (DH), both side halos (Halo) and uniformly doped (UD) transistors using TCAD simulations under various bias conditions. A computationally efficient SPICE model is used to model these trends which shows excellent matching with the measured and TCAD data.

原文English
主出版物標題2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
頁面198-200
頁數3
ISBN(電子)9781509046591
DOIs
出版狀態Published - 13 6月 2017
事件2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Toyama, 日本
持續時間: 28 2月 20172 3月 2017

出版系列

名字2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017 - Proceedings

Conference

Conference2017 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2017
國家/地區日本
城市Toyama
期間28/02/172/03/17

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