Analog placement with current flow and symmetry constraints using PCP-SP

Abhishek Patyal, Po Cheng Pan, K. A. Asha, Hung-Ming Chen, Hao Yu Chi, Chien-Nan Liu

研究成果: Conference contribution同行評審

10 引文 斯高帕斯(Scopus)

摘要

Modern analog placement techniques require consideration of current path and symmetry constraints. The symmetry pairs can be efficiently packed using the symmetry island configurations, but not all these configurations result in minimum gate interconnection, which can impact the overall circuit routing and performance. This paper proposes the first work that reformulates this problem considering all of them together in the form of Parallel Current Path (PCP) constraints. Then a placement algorithm satisfying these constraints is formulated to reduce a vast search space via efficient sequence pair manipulation. Experimental results show that this formulation and algorithm can satisfy all the constraints in a more tightly packed configuration, resulting in lesser routing length, reduced parasitics and thus better post-layout performance.

原文English
主出版物標題Proceedings of the 55th Annual Design Automation Conference, DAC 2018
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(列印)9781450357005
DOIs
出版狀態Published - 24 6月 2018
事件55th Annual Design Automation Conference, DAC 2018 - San Francisco, 美國
持續時間: 24 6月 201829 6月 2018

出版系列

名字Proceedings - Design Automation Conference
Part F137710
ISSN(列印)0738-100X

Conference

Conference55th Annual Design Automation Conference, DAC 2018
國家/地區美國
城市San Francisco
期間24/06/1829/06/18

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