An ultra-thin polycrystalline-silicon thin-film transistor with SiGe raised source/drain

Du Zen Peng*, Po Sheng Shih, Hsiao-Wen Zan, Ta Shun Liao, Chun Yen Chang

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

An ultra-thin poly-Si thin film transistor (Poly-Si TFT) with SiGe raised source/Drain (SiGe RSD) was fabricated. The raised source and drain regions were selectively grown by ultra-high vacuum chemical vapor deposition (UHVCVD) at 550°C. The resultant transistor has an ultra-thin channel region with thickness of 20nm and a self-aligned thick S/D region, Which leads to better performance. With this structure, the turn-on current in the I-V characteristics increases dramatically and the drain breakdown voltage is increases as well, compared with conventional thin-channel poly-Si TFTs.

原文English
主出版物標題European Solid-State Device Research Conference
編輯Elena Gnani, Giorgio Baccarani, Massimo Rudan
發行者IEEE Computer Society
頁面535-538
頁數4
ISBN(電子)8890084782
DOIs
出版狀態Published - 2002
事件32nd European Solid-State Device Research Conference, ESSDERC 2002 - Firenze, Italy
持續時間: 24 9月 200226 9月 2002

出版系列

名字European Solid-State Device Research Conference
ISSN(列印)1930-8876

Conference

Conference32nd European Solid-State Device Research Conference, ESSDERC 2002
國家/地區Italy
城市Firenze
期間24/09/0226/09/02

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