An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices

S. J. Chen*, T. C. Lin, D. K. Lo, J. J. Yang, Steve S. Chung, T. Y. Kao, R. Y. Shiue, C. J. Wang, Y. K. Peng

*此作品的通信作者

    研究成果: Conference article同行評審

    3 引文 斯高帕斯(Scopus)

    摘要

    In this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFET's with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20Å ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us an understanding of the correlation between the device degradation and various stress-induced oxide damage in CMOS devices.

    原文English
    頁(從 - 到)203-207
    頁數5
    期刊Annual Proceedings - Reliability Physics (Symposium)
    DOIs
    出版狀態Published - 21 7月 2003
    事件2003 IEEE International Reliability Physics Symposium Proceedings - Dallas, TX, United States
    持續時間: 30 3月 20034 4月 2003

    指紋

    深入研究「An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices」主題。共同形成了獨特的指紋。

    引用此