An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices

S. J. Chen; T. C. Lin; D. K. Lo; J. J. Yang; Steve S. Chung; T. Y. Kao; R. Y. Shiue; C. J. Wang; Y. K. Peng

doi:10.1109/RELPHY.2003.1197746

An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices

S. J. Chen^*, T. C. Lin, D. K. Lo, J. J. Yang, Steve S. Chung, T. Y. Kao, R. Y. Shiue, C. J. Wang, Y. K. Peng

^*此作品的通信作者

研究成果: Conference article › 同行評審

3 引文斯高帕斯（Scopus）

摘要

In this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFET's with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20Å ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us an understanding of the correlation between the device degradation and various stress-induced oxide damage in CMOS devices.

原文	English
頁（從 - 到）	203-207
頁數	5
期刊	Annual Proceedings - Reliability Physics (Symposium)
DOIs	https://doi.org/10.1109/RELPHY.2003.1197746
出版狀態	Published - 21 7月 2003
事件	2003 IEEE International Reliability Physics Symposium Proceedings - Dallas, TX, 美國持續時間: 30 3月 2003 → 4 4月 2003

存取文件

10.1109/RELPHY.2003.1197746

其它文件與鏈接

Link to publication in Scopus

引用此

@article{2c6faa9282954ba0943225417518f2f2,

title = "An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices",

abstract = "In this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFET's with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20{\AA} ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us an understanding of the correlation between the device degradation and various stress-induced oxide damage in CMOS devices.",

author = "Chen, {S. J.} and Lin, {T. C.} and Lo, {D. K.} and Yang, {J. J.} and Chung, {Steve S.} and Kao, {T. Y.} and Shiue, {R. Y.} and Wang, {C. J.} and Peng, {Y. K.}",

year = "2003",

month = jul,

day = "21",

doi = "10.1109/RELPHY.2003.1197746",

language = "English",

pages = "203--207",

journal = "Annual Proceedings - Reliability Physics (Symposium)",

issn = "0099-9512",

note = "2003 IEEE International Reliability Physics Symposium Proceedings ; Conference date: 30-03-2003 Through 04-04-2003",

}

TY - JOUR

T1 - An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices

AU - Chen, S. J.

AU - Lin, T. C.

AU - Lo, D. K.

AU - Yang, J. J.

AU - Chung, Steve S.

AU - Kao, T. Y.

AU - Shiue, R. Y.

AU - Wang, C. J.

AU - Peng, Y. K.

PY - 2003/7/21

Y1 - 2003/7/21

N2 - In this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFET's with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20Å ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us an understanding of the correlation between the device degradation and various stress-induced oxide damage in CMOS devices.

AB - In this paper, an improved gate-diode technique has been developed for the interface characterization on both n- and p-MOSFET's with gate oxide in the direct tunneling regime. This method has been demonstrated successfully for measuring oxide damage in all of the channel, space-charge (or junction), and drain extension regions in 20Å ultra-thin gate oxide devices. As an application of the present method, the lateral profile of localized oxide damage due to Negative Bias Temperature Instability (NBTI) or Hot Carrier (HC) effect has been demonstrated. It provides us an understanding of the correlation between the device degradation and various stress-induced oxide damage in CMOS devices.

UR - http://www.scopus.com/inward/record.url?scp=0037972833&partnerID=8YFLogxK

U2 - 10.1109/RELPHY.2003.1197746

DO - 10.1109/RELPHY.2003.1197746

M3 - Conference article

AN - SCOPUS:0037972833

SN - 0099-9512

SP - 203

EP - 207

JO - Annual Proceedings - Reliability Physics (Symposium)

JF - Annual Proceedings - Reliability Physics (Symposium)

T2 - 2003 IEEE International Reliability Physics Symposium Proceedings

Y2 - 30 March 2003 through 4 April 2003

ER -

An improved interface characterization technique for a full-range profiling of oxide damage in ultra-thin gate oxide CMOS devices

摘要

存取文件

其它文件與鏈接

指紋

引用此