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An implementation of parallel dynamic load balancing for adaptive computing in VLSI device simulation
Yi-Ming Li
, Cheng Kai Chen
, Shui Sheng Lin
,
Tien-Sheng Chao
, Jinn Liang Lin
, S. M. Sze
電信工程研究所
電子物理學系
研究成果
:
Conference contribution
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1
引文 斯高帕斯(Scopus)
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Keyphrases
Adaptive Computation
100%
Current-voltage Characteristics
50%
Device Simulation
100%
Diode
50%
Domain Decomposition Method
50%
Dynamic Load Balancing
100%
Dynamic Threshold MOSFET (DTMOS)
50%
Error Estimates
50%
Execution Time
50%
Finite Volume
50%
Linux Cluster
50%
Load Balancing
50%
Load Balancing Algorithm
50%
Monotone Iterative Technique
50%
MPI Library
50%
NMOSFET
50%
Numerical Simulation
50%
Order of Magnitude
50%
Parallel Current
50%
Parallel Domain Decomposition
50%
Parallel Dynamics
100%
Parallel Version
50%
Semiconductor Device Modeling
100%
Simulation-based
50%
Volume Error
50%
Engineering
Characteristic Point
50%
Current-Voltage Characteristic
50%
Domain Decomposition
50%
Dynamic Loads
100%
Error Estimation
50%
Execution Time
50%
Measured Data
50%
Metal-Oxide-Semiconductor Field-Effect Transistor
50%
Parallel Version
50%
Semiconductor Device
100%
Computer Science
Domain Decomposition
50%
Dynamic Load Balancing
100%
Error Estimation
50%
Execution Time
50%
Finite Volume
50%
Load Balancing
50%
Numerical Simulation
50%
Parallel Version
50%