An implementation of parallel dynamic load balancing for adaptive computing in VLSI device simulation

Keyphrases

• Device Simulation 100%
• Dynamic Load Balancing 100%
• Semiconductor Device Modeling 100%
• Parallel Dynamics 100%
• Adaptive Computation 100%
• Diode 50%
• NMOSFET 50%
• Order of Magnitude 50%
• Error Estimates 50%
• Load Balancing 50%
• Current-voltage Characteristics 50%
• Numerical Simulation 50%
• Execution Time 50%
• Simulation-based 50%
• Load Balancing Algorithm 50%
• Finite Volume 50%
• Dynamic Threshold MOSFET (DTMOS) 50%
• Linux Cluster 50%
• Monotone Iterative Technique 50%
• Domain Decomposition Method 50%
• Parallel Domain Decomposition 50%
• Parallel Current 50%
• Parallel Version 50%
• MPI Library 50%
• Volume Error 50%

Engineering

• Semiconductor Device 100%
• Dynamic Loads 100%
• Metal-Oxide-Semiconductor Field-Effect Transistor 50%
• Current-Voltage Characteristic 50%
• Execution Time 50%
• Measured Data 50%
• Domain Decomposition 50%
• Error Estimation 50%
• Characteristic Point 50%
• Parallel Version 50%

Computer Science

• Dynamic Load Balancing 100%
• Load Balancing 50%
• Execution Time 50%
• Numerical Simulation 50%
• Finite Volume 50%
• Domain Decomposition 50%
• Error Estimation 50%
• Parallel Version 50%