An implementation of parallel dynamic load balancing for adaptive computing in VLSI device simulation

Yi-Ming Li, Cheng Kai Chen, Shui Sheng Lin, Tien-Sheng Chao, Jinn Liang Lin, S. M. Sze

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

A new parallel semiconductor device simulation using the dynamic load balancing approach is presented. This semiconductor device simulation based on adaptive finite volume error estimation, and monotone iterative methods has been developed and implemented on a Linux-cluster with MPI library. Two different parallel versions of the algorithm to perform a complete device simulation are proposed. The first one is a dynamic parallel domain decomposition approach. The second version is a parallel current-voltage characteristic points simulation. The implementation shows that a well-designed load balancing simulation can reduce the execution time up to an order of magnitude. Compared with the measured data, numerical simulations on P-N diode, N-MOSFET, and DTMOS devices are presented to show the accuracy and efficiency of the method.

原文American English
主出版物標題Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1-6
頁數6
ISBN(電子)0769509908, 9780769509907
DOIs
出版狀態Published - 23 4月 2001
事件15th International Parallel and Distributed Processing Symposium, IPDPS 2001 - San Francisco, United States
持續時間: 23 4月 200127 4月 2001

出版系列

名字Proceedings - 15th International Parallel and Distributed Processing Symposium, IPDPS 2001

Conference

Conference15th International Parallel and Distributed Processing Symposium, IPDPS 2001
國家/地區United States
城市San Francisco
期間23/04/0127/04/01

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