TY - GEN
T1 - An event-driven incremental timing fault simulator
AU - Jou, Shyh-Jye
AU - Shen, Wen Zen
AU - Chiou, Shwu Huey
PY - 1991/1/1
Y1 - 1991/1/1
N2 - An efficient MOS multiple sets of multiple faults simulator with electrical timing information is presented. By using event-driven, selective trace and mixed incremental-in-space, signal and time simulation techniques, the simulation results show that it is superior in speedup, extra memory used and precision to other approaches. Moreover, this simulator is suited for parallel simulation in a multiprocessor system.
AB - An efficient MOS multiple sets of multiple faults simulator with electrical timing information is presented. By using event-driven, selective trace and mixed incremental-in-space, signal and time simulation techniques, the simulation results show that it is superior in speedup, extra memory used and precision to other approaches. Moreover, this simulator is suited for parallel simulation in a multiprocessor system.
UR - http://www.scopus.com/inward/record.url?scp=85069737827&partnerID=8YFLogxK
U2 - 10.1109/VTSA.1991.246754
DO - 10.1109/VTSA.1991.246754
M3 - Conference contribution
AN - SCOPUS:85069737827
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
SP - 424
EP - 427
BT - 1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers, VTSA 1991
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1991 International Symposium on VLSI Technology, Systems, and Applications, VTSA 1991
Y2 - 22 May 1991 through 24 May 1991
ER -