An ESD-protected 5-GHz differential low-noise amplifier in a 130-nm CMOS process

Keyphrases

• 130 Nm CMOS 100%
• Clamping Device 33%
• CMOS Process 100%
• Differential Input 66%
• Differential Low Noise Amplifier 100%
• ESD Current 33%
• ESD Protection Design 100%
• ESD Protection Device 33%
• ESD Robustness 66%
• Input Matching Network 33%
• Input-output 33%
• Low Noise Amplifier 33%
• Noise Figure 33%
• Power Consumption 33%
• Power Gain 33%
• Power Supply 33%
• Radio Frequency 33%
• Radio Frequency Performance 33%
• Stress Conditions 33%

Engineering

• Differential Input 50%
• Electric Power Utilization 25%
• Experimental Result 25%
• Low Noise Amplifier 100%
• Matching Network 25%
• Noise Figure 25%
• Power Gain 25%
• Power Supply 25%
• Radio Frequency 50%
• Stress Condition 25%