An ESD-protected 5-GHz differential low-noise amplifier in a 130-nm CMOS process

Yuan Wen Hsiao*, Ming-Dou Ker

*此作品的通信作者

    研究成果: Conference article同行評審

    6 引文 斯高帕斯(Scopus)

    摘要

    A novel ESD protection design for radio-frequency (RF) differential input/output (I/O) pads is proposed and successfully applied to a 5-GHz differential low-noise amplifier (LNA) in a 130-nm CMOS process. In the proposed ESD protection design, an ESD bus and a local ESD clamp device are added between the differential input pads to quickly bypass ESD current, especially under the pin-to-pin ESD-stress condition. With 10.3-mW power consumption under 1.2-V power supply, the differential LNA with the proposed ESD protection design has the human-bodymodel (HBM) ESD robustness of 3 kV, and exhibits 18-dB power gain and 2.62-dB noise figure at 5 GHz. Experimental results have demonstrated that the proposed ESD protection circuit can be co-designed with the input matching network of LNA to simultaneously achieve excellent RF performance and high ESD robustness.

    原文English
    文章編號4672066
    頁(從 - 到)233-236
    頁數4
    期刊Proceedings of the Custom Integrated Circuits Conference
    DOIs
    出版狀態Published - 2008
    事件IEEE 2008 Custom Integrated Circuits Conference, CICC 2008 - San Jose, CA, United States
    持續時間: 21 9月 200824 9月 2008

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