摘要
Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The controller extraction algorithm uses an approach that frees it from restrictions on HDL code writing style.
原文 | English |
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頁(從 - 到) | 72-77 |
頁數 | 6 |
期刊 | IEEE Design and Test of Computers |
卷 | 17 |
發行號 | 3 |
DOIs | |
出版狀態 | Published - 1 7月 2000 |