An all-digital Read Stability and Write Margin characterization scheme for CMOS 6T SRAM array
Yi Wei Lin*, Ming Chien Tsai, Hao I. Yang, Geng Cing Lin, Shao Cheng Wang, Ching Te Chuang, Shyh-Jye Jou, Wei Hwang, Nan Chun Lien, Kuen Di Lee, Wei Chiang Shih