An accurate RF CMOS gate resistance model compatible with HSPICE

H. W. Lin*, Steve S. Chung, S. C. Wong, G. W. Huang

*此作品的通信作者

    研究成果: Paper同行評審

    6 引文 斯高帕斯(Scopus)

    摘要

    Two important models, which are crucial to the RF CMOS, are the gate resistance and substrate resistance. Both are closely related to the development of accurate device and/or circuit models, such as noise. From the experimental observations, we found that the gate resistance depends largely on the bias and temperature. It will greatly impact the device performance at high frequency. For the first time, a simple and analytical physical-based gate resistance model is developed in this paper and has been implemented in Spice. The gate resistance is modeled by a parallel interconnection of the intrinsic gate resistance and a resistance coupled from the channel. The Spice simulation result of this model is more accurate than that of using a constant R g model. A constant Rg model will overestimate the value of Y11. While, in contrast, the proposed nonlinear gate resistance model with both bias and frequency dependent feature can achieve very good accuracy.

    原文English
    頁面227-230
    頁數4
    DOIs
    出版狀態Published - 3月 2004
    事件Proceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004) - Awaji, Japan
    持續時間: 22 3月 200425 3月 2004

    Conference

    ConferenceProceedings of the 2004 International Conference on Microelectronic Test Structures (ICMTS 2004)
    國家/地區Japan
    城市Awaji
    期間22/03/0425/03/04

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