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ACNPU: A 4.75TOPS/W 1080P@30FPS Super Resolution Accelerator With Decoupled Asymmetric Convolution
Tun Hao Yang,
Tian Sheuan Chang
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電子研究所
神經調控醫療電子系統研究中心
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Keyphrases
Super-resolution
100%
Asymmetric Convolution
100%
FSRCNN
100%
Energy Efficient
50%
Energy Efficiency
50%
Hardware Efficiency
50%
Reconfigurable
50%
Processing Element
50%
Limited Resources
50%
Energy Consumption Reduction
50%
Memory Bandwidth
50%
Image Quality
50%
On-chip Memory
50%
Deep Learning
50%
Gate Count
50%
High Complexity
50%
Feature Map
50%
40nm CMOS
50%
Edge Devices
50%
Uniform Data Set
50%
DRAM Access
50%
Layer Model
50%
Similarity Model
50%
Easy to Control
50%
4-Scale
50%
Model Size
50%
Traditional Techniques
50%
Shallow Model
50%
Efficient Super-resolution
50%
Model Fusion
50%
Layer Fusion
50%
Parallel Layers
50%
Intermediate Features
50%
Engineering
Memory Bandwidth
100%
Deep Learning
50%
Energy Efficiency
50%
Energy Engineering
50%
Energy Conservation
50%
Processing Element
50%
Shallower
50%
Data Flow
50%
Reduce Power Consumption
50%
Chip Memory
50%
Parameter Model
50%
Limited Resource
50%
Layer Model
50%
Stationary Input
50%
Computer Science
super resolution
100%
Energy Efficient
33%
Energy Efficiency
33%
Processing Element
33%
Deep Learning
33%
Reduce Power Consumption
33%
Memory Bandwidth
33%
Chip Memory Bandwidth
33%
Image Quality
33%
Parameter Model
33%
Execution Layer
33%
Stationary Input
33%