Abnormal positive bias stress instability of In-Ga-Zn-O thin-film transistors with low-temperature Al₂O₃ gate dielectric

Low-temperature atomic layer deposition (ALD) was employed to deposit Al₂O₃ as a gate dielectric in amorphous In-Ga-Zn-O thin-film transistors fabricated at temperatures below 120 °C. The devices exhibited a negligible threshold voltage shift (ΔV_T) during negative bias stress, but a more pronounced ΔV_T under positive bias stress with a characteristic turnaround behavior from a positive ΔV_T to a negative ΔV_T. This abnormal positive bias instability is explained using a two-process model, including both electron trapping and hydrogen release and migration. Electron trapping induces the initial positive ΔV_T, which can be fitted using the stretched exponential function. The breakage of residual AlO-H bonds in low-temperature ALD Al₂O₃ is triggered by the energetic channel electrons. The hydrogen atoms then diffuse toward the In-Ga-Zn-O channel and induce the negative ΔV_T through electron doping with power-law time dependence. A rapid partial recovery of the negative ΔV_T after stress is also observed during relaxation.