A W-band 6.8 mW low-noise amplifier in 90 nm CMOS technology using noise measure

Po Chen Yeh, Chien-Nan Kuo

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

A W-band low-noise amplifier consisting of seven common-source transistor stages is designed using noise measure as the figure of merit for circuit optimization. Fabricated in 90 nm CMOS technology, the die size is 0.38 mm2, while the core active area only 0.1 mm2. The circuit gives peak power gain of 21.5 dB at 90 GHz and noise figure of 8.3 dB, with dc power consumption of only 6.8 mW.

原文English
主出版物標題2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728103976
DOIs
出版狀態Published - 1 一月 2019
事件2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
持續時間: 26 五月 201929 五月 2019

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2019-May
ISSN(列印)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
國家/地區Japan
城市Sapporo
期間26/05/1929/05/19

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