@inproceedings{68a29a987bac49a68b3a367205b75c4f,
title = "A Stack-Based In-Pixel Storage Circuit for SPAD Photon Counting",
abstract = "Single-photon avalanche diodes (SPADs) have attracted a lot of attention these days because of the ability to detect a single photon for many emerging applications. However, planar SPAD sensor arrays often suffer from serious photon loss because the readout bottleneck dominates the overall dead time. This paper presents a stack-based in-pixel storage circuit for high-throughput SPAD imaging. The proposed circuit helps a SPAD imaging chip solve the buffer saturation problem and reduces its dead time by half compared to single-bit storage. Fabricated in TSMC HV 0.18μm CMOS technology, each pixel in the SPAD array can record at most three photons in 50 ns, resulting in 40Mfps. The minimum integration time to form an 8-bit image is reduced to 6.4μs while maintaining global shutter exposure.",
keywords = "SPAD, SPC, high-speed camera, in-pixel storage",
author = "Huang, {Tzu Yun} and Huang, {Hsi Hao} and Liu, {Chun Hsien} and Lin, {Sheng Di} and Lee, {Chen Yi}",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 56th IEEE International Symposium on Circuits and Systems, ISCAS 2023 ; Conference date: 21-05-2023 Through 25-05-2023",
year = "2023",
doi = "10.1109/ISCAS46773.2023.10182115",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "ISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings",
address = "United States",
}