A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation

Yu Huei Lee; Wei Chung Chen; Chao Chang Chiu; Shen Yu Peng; Kuan Yu Chu; Ke-Horng Chen; Ying Hsi Lin; Tsung Yen Tsai; Chen Chih Huang; Chao Cheng Lee; Yu Wen Chen; Chao Chiun Liang; Chang An Ho; Tun Hao Yu

doi:10.1109/IPEC.2012.6522666

A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation

Yu Huei Lee, Wei Chung Chen, Chao Chang Chiu, Shen Yu Peng, Kuan Yu Chu, Ke-Horng Chen, Ying Hsi Lin, Tsung Yen Tsai, Chen Chih Huang, Chao Cheng Lee, Yu Wen Chen, Chao Chiun Liang, Chang An Ho, Tun Hao Yu

電機工程學系

研究成果: Paper › 同行評審

4 引文斯高帕斯（Scopus）

摘要

A single-inductor dual-output (SIDO) converter with the switchable digital-or-analog (D/A) low-dropout (LDO) regulator achieves an analog dynamic voltage scaling (ADVS) function for ripple suppression and high efficiency in system-on-a-chip (SoC). The ADVS function helps dynamically adjust the dropout voltage of the switchable D/A LDO regulator with analog operation for ripple suppression according to the load current. On other hand, the switchable D/A LDO regulator activates the digital operation for high efficiency at light loads since the dropout voltage of the LDO regulator can be further reduced. Besides, the bidirectional asynchronous signal pipeline (BASP) can realize the 50nA quiescent current in digital LDO regulator. This chip was fabricated by the 40 nm CMOS process. Experimental results demonstrate the switchable LDO regulator operation with the peak efficiency of 92% and the 7 mV output voltage ripple at 200 mA load because of the ripple suppression. The efficiency can be kept higher than 83% even the load current is 1 mA.

原文	English
頁面	225-228
頁數	4
DOIs	https://doi.org/10.1109/IPEC.2012.6522666
出版狀態	Published - 1 12月 2012
事件	2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012 - Kobe, Japan 持續時間: 12 11月 2012 → 14 11月 2012

Conference

Conference	2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012
國家/地區	Japan
城市	Kobe
期間	12/11/12 → 14/11/12

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10.1109/IPEC.2012.6522666

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Lee, Y. H., Chen, W. C., Chiu, C. C., Peng, S. Y., Chu, K. Y., Chen, K.-H., Lin, Y. H., Tsai, T. Y., Huang, C. C., Lee, C. C., Chen, Y. W., Liang, C. C., Ho, C. A., & Yu, T. H. (2012). A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation. 225-228. 論文發表於 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012, Kobe, Japan. https://doi.org/10.1109/IPEC.2012.6522666

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title = "A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation",

abstract = "A single-inductor dual-output (SIDO) converter with the switchable digital-or-analog (D/A) low-dropout (LDO) regulator achieves an analog dynamic voltage scaling (ADVS) function for ripple suppression and high efficiency in system-on-a-chip (SoC). The ADVS function helps dynamically adjust the dropout voltage of the switchable D/A LDO regulator with analog operation for ripple suppression according to the load current. On other hand, the switchable D/A LDO regulator activates the digital operation for high efficiency at light loads since the dropout voltage of the LDO regulator can be further reduced. Besides, the bidirectional asynchronous signal pipeline (BASP) can realize the 50nA quiescent current in digital LDO regulator. This chip was fabricated by the 40 nm CMOS process. Experimental results demonstrate the switchable LDO regulator operation with the peak efficiency of 92% and the 7 mV output voltage ripple at 200 mA load because of the ripple suppression. The efficiency can be kept higher than 83% even the load current is 1 mA.",

author = "Lee, {Yu Huei} and Chen, {Wei Chung} and Chiu, {Chao Chang} and Peng, {Shen Yu} and Chu, {Kuan Yu} and Ke-Horng Chen and Lin, {Ying Hsi} and Tsai, {Tsung Yen} and Huang, {Chen Chih} and Lee, {Chao Cheng} and Chen, {Yu Wen} and Liang, {Chao Chiun} and Ho, {Chang An} and Yu, {Tun Hao}",

year = "2012",

month = dec,

day = "1",

doi = "10.1109/IPEC.2012.6522666",

language = "English",

pages = "225--228",

note = "2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012 ; Conference date: 12-11-2012 Through 14-11-2012",

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Lee, YH, Chen, WC, Chiu, CC, Peng, SY, Chu, KY, Chen, K-H, Lin, YH, Tsai, TY, Huang, CC, Lee, CC, Chen, YW, Liang, CC, Ho, CA & Yu, TH 2012, 'A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation', 論文發表於 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012, Kobe, Japan, 12/11/12 - 14/11/12 頁 225-228. https://doi.org/10.1109/IPEC.2012.6522666

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T1 - A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation

AU - Lee, Yu Huei

AU - Chen, Wei Chung

AU - Chiu, Chao Chang

AU - Peng, Shen Yu

AU - Chu, Kuan Yu

AU - Chen, Ke-Horng

AU - Lin, Ying Hsi

AU - Tsai, Tsung Yen

AU - Huang, Chen Chih

AU - Lee, Chao Cheng

AU - Chen, Yu Wen

AU - Liang, Chao Chiun

AU - Ho, Chang An

AU - Yu, Tun Hao

PY - 2012/12/1

Y1 - 2012/12/1

N2 - A single-inductor dual-output (SIDO) converter with the switchable digital-or-analog (D/A) low-dropout (LDO) regulator achieves an analog dynamic voltage scaling (ADVS) function for ripple suppression and high efficiency in system-on-a-chip (SoC). The ADVS function helps dynamically adjust the dropout voltage of the switchable D/A LDO regulator with analog operation for ripple suppression according to the load current. On other hand, the switchable D/A LDO regulator activates the digital operation for high efficiency at light loads since the dropout voltage of the LDO regulator can be further reduced. Besides, the bidirectional asynchronous signal pipeline (BASP) can realize the 50nA quiescent current in digital LDO regulator. This chip was fabricated by the 40 nm CMOS process. Experimental results demonstrate the switchable LDO regulator operation with the peak efficiency of 92% and the 7 mV output voltage ripple at 200 mA load because of the ripple suppression. The efficiency can be kept higher than 83% even the load current is 1 mA.

AB - A single-inductor dual-output (SIDO) converter with the switchable digital-or-analog (D/A) low-dropout (LDO) regulator achieves an analog dynamic voltage scaling (ADVS) function for ripple suppression and high efficiency in system-on-a-chip (SoC). The ADVS function helps dynamically adjust the dropout voltage of the switchable D/A LDO regulator with analog operation for ripple suppression according to the load current. On other hand, the switchable D/A LDO regulator activates the digital operation for high efficiency at light loads since the dropout voltage of the LDO regulator can be further reduced. Besides, the bidirectional asynchronous signal pipeline (BASP) can realize the 50nA quiescent current in digital LDO regulator. This chip was fabricated by the 40 nm CMOS process. Experimental results demonstrate the switchable LDO regulator operation with the peak efficiency of 92% and the 7 mV output voltage ripple at 200 mA load because of the ripple suppression. The efficiency can be kept higher than 83% even the load current is 1 mA.

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T2 - 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012

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A single-inductor dual-output converter with switchable digital-or-analog low-dropout regulator for ripple suppression and high efficiency operation

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