A single-chip 2.5-Gb/s CMOS burst-mode optical receiver

Wei-Zen Chen*, Ruei Ming Gan, Shih Hao Huang


    研究成果: Article同行評審

    11 引文 斯高帕斯(Scopus)


    This paper describes the design of a 2.5-Gb/s burst-mode optical receiver in a 0.18-/um CMOS process. A dual-gain-mode transimpedance amplifier (TIA) with constant damping factor control is proposed to tolerate a wide dynamic range input signal. By incorporating an automatic threshold tracking circuit (ATC), the TIA and limiting amplifier (LA) are dc coupled with feedforward offset cancellation. Dual-band filters are adopted in the ATC for a rapid response time while keeping the tracking error small. By integrating both a TIA and a post-LA in a single chip, the burst-mode receiver provides a conversion gain of 106 dB · Ω in the high gain mode, 97 dB · Ω in the low gain mode, and a -3-dB bandwidth of 1.85 GHz. The measured input sensitivity, overload level, and dynamic range of the optical receiver are -19 dBm, -2 dBm, and 17 dB, respectively. The response time is less than 50 ns. Operating under a single 1.8-V supply, this chip dissipates only 122 mW.

    頁(從 - 到)2325-2331
    期刊IEEE Transactions on Circuits and Systems I: Regular Papers
    出版狀態Published - 1 12月 2009


    深入研究「A single-chip 2.5-Gb/s CMOS burst-mode optical receiver」主題。共同形成了獨特的指紋。