A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c

Wei Chang Liu; Fu Chun Yeh; Ting Chen Wei; Ya Shiue Huang; Tai Yang Liu; Shen Jui Huang; Ching Da Chan; Shyh-Jye Jou; Sau-Gee Chen

doi:10.1109/ISCAS.2013.6571966

A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c

Wei Chang Liu, Fu Chun Yeh, Ting Chen Wei, Ya Shiue Huang, Tai Yang Liu, Shen Jui Huang, Ching Da Chan, Shyh-Jye Jou, Sau-Gee Chen

電子研究所

研究成果: Conference contribution › 同行評審

5 引文斯高帕斯（Scopus）

摘要

In this paper, an 8X-parallelism digital baseband receiver is proposed for IEEE 802.15.3c application. The baseband receiver consists of all-digital synchronization, radix-16 FFT and LS-LMS equalizer modules. It supports SC and HSI dual-mode in IEEE 802.15.3c with single hardware for area efficiency. The chip is implemented with 65 nm 1P9M process. The fabricated area is 12.96 mm² with 3463 K gate counts. The post-layout verification shows the throughput rate under QPSK modulation achieves 3.52 Gb/s and 5.28 Gb/s for SC mode (220 MHz) and HSI mode (330 MHz), respectively.

原文	English
主出版物標題	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
頁面	793-796
頁數	4
DOIs	https://doi.org/10.1109/ISCAS.2013.6571966
出版狀態	Published - 9 9月 2013
事件	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China 持續時間: 19 5月 2013 → 23 5月 2013

出版系列

名字	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN（列印）	0271-4310

Conference

Conference	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
國家/地區	China
城市	Beijing
期間	19/05/13 → 23/05/13

存取文件

10.1109/ISCAS.2013.6571966

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Link to publication in Scopus

引用此

Liu, W. C., Yeh, F. C., Wei, T. C., Huang, Y. S., Liu, T. Y., Huang, S. J., Chan, C. D., Jou, S-J., & Chen, S-G. (2013). A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c. 於 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 (頁 793-796). [6571966] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2013.6571966

@inproceedings{0220d0e1b10747bcbb5b17346b02c2ad,

title = "A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c",

abstract = "In this paper, an 8X-parallelism digital baseband receiver is proposed for IEEE 802.15.3c application. The baseband receiver consists of all-digital synchronization, radix-16 FFT and LS-LMS equalizer modules. It supports SC and HSI dual-mode in IEEE 802.15.3c with single hardware for area efficiency. The chip is implemented with 65 nm 1P9M process. The fabricated area is 12.96 mm2 with 3463 K gate counts. The post-layout verification shows the throughput rate under QPSK modulation achieves 3.52 Gb/s and 5.28 Gb/s for SC mode (220 MHz) and HSI mode (330 MHz), respectively.",

author = "Liu, {Wei Chang} and Yeh, {Fu Chun} and Wei, {Ting Chen} and Huang, {Ya Shiue} and Liu, {Tai Yang} and Huang, {Shen Jui} and Chan, {Ching Da} and Shyh-Jye Jou and Sau-Gee Chen",

year = "2013",

month = sep,

day = "9",

doi = "10.1109/ISCAS.2013.6571966",

language = "English",

isbn = "9781467357609",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "793--796",

booktitle = "2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013",

note = "2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 ; Conference date: 19-05-2013 Through 23-05-2013",

}

Liu, WC, Yeh, FC, Wei, TC, Huang, YS, Liu, TY, Huang, SJ, Chan, CD, Jou, S-J & Chen, S-G 2013, A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c. 於 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013., 6571966, Proceedings - IEEE International Symposium on Circuits and Systems, 頁 793-796, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013, Beijing, China, 19/05/13. https://doi.org/10.1109/ISCAS.2013.6571966

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AU - Liu, Wei Chang

AU - Yeh, Fu Chun

AU - Wei, Ting Chen

AU - Huang, Ya Shiue

AU - Liu, Tai Yang

AU - Huang, Shen Jui

AU - Chan, Ching Da

AU - Jou, Shyh-Jye

AU - Chen, Sau-Gee

PY - 2013/9/9

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N2 - In this paper, an 8X-parallelism digital baseband receiver is proposed for IEEE 802.15.3c application. The baseband receiver consists of all-digital synchronization, radix-16 FFT and LS-LMS equalizer modules. It supports SC and HSI dual-mode in IEEE 802.15.3c with single hardware for area efficiency. The chip is implemented with 65 nm 1P9M process. The fabricated area is 12.96 mm2 with 3463 K gate counts. The post-layout verification shows the throughput rate under QPSK modulation achieves 3.52 Gb/s and 5.28 Gb/s for SC mode (220 MHz) and HSI mode (330 MHz), respectively.

AB - In this paper, an 8X-parallelism digital baseband receiver is proposed for IEEE 802.15.3c application. The baseband receiver consists of all-digital synchronization, radix-16 FFT and LS-LMS equalizer modules. It supports SC and HSI dual-mode in IEEE 802.15.3c with single hardware for area efficiency. The chip is implemented with 65 nm 1P9M process. The fabricated area is 12.96 mm2 with 3463 K gate counts. The post-layout verification shows the throughput rate under QPSK modulation achieves 3.52 Gb/s and 5.28 Gb/s for SC mode (220 MHz) and HSI mode (330 MHz), respectively.

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T3 - Proceedings - IEEE International Symposium on Circuits and Systems

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BT - 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013

T2 - 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013

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ER -

A SC/HSI dual-mode baseband receiver with frequency-domain equalizer for IEEE 802.15.3c

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