A reliable brain computer interface implemented on an FPGA for a mobile dialing system

Chih Wei Feng, Ting Kuei Hu, Jui Chung Chang, Wai-Chi  Fang

研究成果: Conference contribution同行評審

4 引文 斯高帕斯(Scopus)

摘要

This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose a phone number by gazing at the display interface. This proposed EEG system has been implemented in Field-Programmable Gate Arrays (FPGA), and shows high accuracy, high integration density, and low cost. These features are meaningful for implementing a real-time SSVEP-based BCI.

原文English
主出版物標題2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
發行者Institute of Electrical and Electronics Engineers Inc.
頁面654-657
頁數4
ISBN(列印)9781479934324
DOIs
出版狀態Published - 1 1月 2014
事件2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia
持續時間: 1 6月 20145 6月 2014

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Conference

Conference2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
國家/地區Australia
城市Melbourne, VIC
期間1/06/145/06/14

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