A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systems

Yuan Hao Chang, Ming Chang Yang, Tei Wei Kuo, Ren Hung Hwang

研究成果: Article同行評審

24 引文 斯高帕斯(Scopus)

摘要

Although flash memory has gained very strong momentum in the storage market, the reliability of flashmemory chips has been dropped significantly in the past years. This article presents a reliability enhancement design under the flash management layer (i.e., flash translation layer) to address this concern so as to reduce the design complexity of flash-memory management software/firmware and to improve the maintainability and portability of existing and future products. In particular, a log-based write strategy with a hash-based caching policy is proposed to provide extra ECC redundancy and performance improvement. Strategies for bad block management are also presented. The failure rate of flash-memory storage systems is analyzed with the considerations of bit errors. The proposed design is later evaluated by a series of experiments based on realistic traces. It was shown that the proposed approach could significantly improve the reliability of flash memory with very limited system overheads.

原文English
文章編號10
期刊Transactions on Embedded Computing Systems
13
發行號1
DOIs
出版狀態Published - 8月 2013

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