@inproceedings{e0f900b62ea54491979036a1f67f5a7c,
title = "A reconfigurable MAC architecture implemented with mixed-Vt standard cell library",
abstract = "In this paper, a 32-bit reconfigurable multiplication-accumulation architecture, which can execute flexibly one 32x32, two 16x16 or four 8x8 two's complement multiply-accumulation, is proposed and demonstrated. It is based on the modified Booth encoding scheme and designed with techniques of reducing sign-extension bits, removing one extra partial product row and adjusting the positions of hot signals but with elegant modifications. It is implemented with a 130nm mixed-Vt CMOS standard cell library and shows saving of area and power consumption by approximately 16\% and 14\% respectively as compared to the previous design.",
author = "Wang, \{Li Rong\} and Chiu, \{Yi Wei\} and Hu, \{Chia Lin\} and Tu, \{Ming Hsien\} and Shyh-Jye Jou and Lee, \{Chung Len\}",
year = "2008",
doi = "10.1109/ISCAS.2008.4542195",
language = "English",
isbn = "9781424416844",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
pages = "3426--3429",
booktitle = "2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008",
note = "2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 ; Conference date: 18-05-2008 Through 21-05-2008",
}