A practical power model of AMBA system for high-level power analysis

Sung Che Li*, Wei Ting Liao, Mu Shun Lee, Wen Tsan Hsieh, Chien-Nan Liu

*此作品的通信作者

研究成果: Conference contribution同行評審

1 引文 斯高帕斯(Scopus)

摘要

Nowadays, the communication architecture has become a major source of power consumption in complicated System-on-Chip (SoC) designs. In this paper, a practical cycle-accurate power model for on-chip communication architecture using AMBA system is proposed to help high-level power analysis. According to the distinct properties of each bus component, different methods are adopted to build accurate power models. In addition, the proposed power model can be integrated into RTL simulator easily, which allows performing the power analysis at high level. The experiment results have shown that the average error of the proposed power model is less than 5.14% and the simulation overhead is less than 8.7%.

原文English
主出版物標題2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
頁面347-350
頁數4
DOIs
出版狀態Published - 1 十二月 2009
事件2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09 - Hsinchu, Taiwan
持續時間: 28 四月 200930 四月 2009

出版系列

名字2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09

Conference

Conference2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09
國家/地區Taiwan
城市Hsinchu
期間28/04/0930/04/09

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