TY - JOUR
T1 - A power and area efficient multi-mode FEC processor
AU - Tseng, Yi Chen
AU - Lin, Chien Ching
AU - Chang, Hsie-Chia
AU - Lee, Chen-Yi
PY - 2004/9/7
Y1 - 2004/9/7
N2 - Forward Error Correction (FEC) is a key component in communication system which mostly contains scrambler, Reed-Solomon coding, interleaving, and trellis coding. For the performance and complexity issues, design parameters are different in various applications. In this paper, a multi-mode FEC processor is presented to meet different system requirements with a power and area efficient architecture. The proposed processor is fully compliant to ITU-T J.83 cable modem system including the reconfigurable Reed-Solomon decoder and memory-based universal convolutional interleaver. With 0.18um 1P6M CMOS technology, the simulation result shows the FEC decoder can work over 100MHz while costs 54.5K gate counts and two 376×8 bits embedded duel-port SRAM. The average power consumption in most critical mode is about 34.2mW at 100MHz. While running at 7MHz that meets symbol rate of cable modem, the power dissipation is 2.32mW.
AB - Forward Error Correction (FEC) is a key component in communication system which mostly contains scrambler, Reed-Solomon coding, interleaving, and trellis coding. For the performance and complexity issues, design parameters are different in various applications. In this paper, a multi-mode FEC processor is presented to meet different system requirements with a power and area efficient architecture. The proposed processor is fully compliant to ITU-T J.83 cable modem system including the reconfigurable Reed-Solomon decoder and memory-based universal convolutional interleaver. With 0.18um 1P6M CMOS technology, the simulation result shows the FEC decoder can work over 100MHz while costs 54.5K gate counts and two 376×8 bits embedded duel-port SRAM. The average power consumption in most critical mode is about 34.2mW at 100MHz. While running at 7MHz that meets symbol rate of cable modem, the power dissipation is 2.32mW.
UR - http://www.scopus.com/inward/record.url?scp=4344626182&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2004.1329256
DO - 10.1109/ISCAS.2004.1329256
M3 - Conference article
AN - SCOPUS:4344626182
SN - 0271-4310
VL - 2
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - 2004 IEEE International Symposium on Cirquits and Systems - Proceedings
Y2 - 23 May 2004 through 26 May 2004
ER -