A phase-based single-bit Delta-Sigma ADC architecture

Yiqiao Lin*, De Wen Liao, Chung-Chih Hung, Mohammed Ismail

*此作品的通信作者

研究成果: Conference contribution同行評審

2 引文 斯高帕斯(Scopus)

摘要

A Phase-based Delta-Sigma (ΔΣ) Analog-to-Digital Converter (ADC) adopting a Delay-Locked-Loop (DLL) mechanism is presented. It is realized by a modification of a DLL using a Voltage-Controlled Delay Line (VCDL) based quantizer and a charge pump in the feedback path. The proposed architecture offers both reference jitter shaping and quantization noise shaping. Simulation results show that the proposed δσ ADC achieved 7.99 bits resolution with OSR =32 for a 10 MHz signal bandwidth.

原文English
主出版物標題2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
頁面406-409
頁數4
DOIs
出版狀態Published - 13 9月 2011
事件2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011 - Bordeaux, France
持續時間: 26 6月 201129 6月 2011

出版系列

名字2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011

Conference

Conference2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
國家/地區France
城市Bordeaux
期間26/06/1129/06/11

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