A Normally-Off GaN MIS-HEMT Fabricated Using Atomic Layer Etching to Improve Device Performance Uniformity for High Power Applications

Tsung Ying Yang, Huuan Yao Huang, Yan Kui Liang, Jui Sheng Wu, Mei Yan Kuo, Kuan Pang Chang, Heng Tung Hsu, Edward Yi Chang*

*此作品的通信作者

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)

摘要

Normally-off ferroelectric charge trap gate stack GaN high electron mobility transistor (FEG-HEMT) was fabricated with atomic layer etching (ALE) to precisely control the device parameters including Vth of the device. The ALE process consists of cyclic Cl2 adsorption modification steps and the Ar ion removal steps. The ALE process achieved etch-per-cycle (EPC) of 0.347 nm/cycle and superior etching morphology with RMS =0.281 nm. The fabricated GaN HEMT using the ALE process exhibited a high threshold voltage (Vth ) of 5.06 V, high maximum drain current (I D,MAX) of 772 mA/mm with low on-resistance (Ron) of 8.57∼\Ω mm and high breakdown voltage (BV) of 888 V, the device also showed good Vth uniformity. Finally, the contact resistance (Rc) was reduced from 0.46∼\Ω \mm to 0.15∼\Ω \mm by the ALE process, and the dynamic on-resistance (dyn- Ron) was improved at the same time.

原文English
頁(從 - 到)1629-1632
頁數4
期刊Ieee Electron Device Letters
43
發行號10
DOIs
出版狀態Published - 1 10月 2022

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