A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process

Shih Lun Chen*, Ming-Dou Ker

*此作品的通信作者

    研究成果: Conference contribution同行評審

    7 引文 斯高帕斯(Scopus)

    摘要

    An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X I/O circuits in a 0.13-μm 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V PCI-X interface. Besides, a level converter with only 1-V and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.

    原文English
    主出版物標題Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
    頁面112-115
    頁數4
    DOIs
    出版狀態Published - 1 12月 2004
    事件Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits - Fukuoka, Japan
    持續時間: 4 8月 20045 8月 2004

    出版系列

    名字Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

    Conference

    ConferenceProceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
    國家/地區Japan
    城市Fukuoka
    期間4/08/045/08/04

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