TY - JOUR
T1 - A new group distributed arithmetic design for the one dimensional discrete Fourier transform
AU - Chen, Hun Chen
AU - Guo, Jiun-In
AU - Jen, Chien Wei
PY - 2002/1/1
Y1 - 2002/1/1
N2 - This paper presents a new group distributed arithmetic (GDA) design for the one-dimensional discrete Fourier transform (1-D DFT). We adopt the way of Distributed Arithmetic (DA) computation and exploit the good features of the cyclic convolution to facilitate an efficient realization of one-dimensional N-point DFT using ROM module with small size, a barrier shifter, and N accumulators. To increase the ROM utilization, we re-arrange the content of ROM into several groups in which all the elements in a group will be accessed simultaneously in accumulating all the DFT outputs in word-parallel and bit-serial manner. It is called the GDA design approach in this paper. To compare the results with the traditional DA design, the design with the proposed approach can reduce significantly both the hardware cost and the propagation delay.
AB - This paper presents a new group distributed arithmetic (GDA) design for the one-dimensional discrete Fourier transform (1-D DFT). We adopt the way of Distributed Arithmetic (DA) computation and exploit the good features of the cyclic convolution to facilitate an efficient realization of one-dimensional N-point DFT using ROM module with small size, a barrier shifter, and N accumulators. To increase the ROM utilization, we re-arrange the content of ROM into several groups in which all the elements in a group will be accessed simultaneously in accumulating all the DFT outputs in word-parallel and bit-serial manner. It is called the GDA design approach in this paper. To compare the results with the traditional DA design, the design with the proposed approach can reduce significantly both the hardware cost and the propagation delay.
UR - http://www.scopus.com/inward/record.url?scp=0036296903&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2002.1009867
DO - 10.1109/ISCAS.2002.1009867
M3 - Conference article
AN - SCOPUS:0036296903
SN - 0271-4310
VL - 1
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - 2002 IEEE International Symposium on Circuits and Systems
Y2 - 26 May 2002 through 29 May 2002
ER -