A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes

Tzu Ming Wang; Wan Yi Shen; Ming-Dou Ker

doi:10.1109/ICECS.2007.4510966

A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes

Tzu Ming Wang^*, Wan Yi Shen, Ming-Dou Ker

^*此作品的通信作者

研究成果: Conference contribution › 同行評審

摘要

A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.

原文	English
主出版物標題	ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems
頁面	206-209
頁數	4
DOIs	https://doi.org/10.1109/ICECS.2007.4510966
出版狀態	Published - 1 12月 2007
事件	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007 - Marrakech, Morocco 持續時間: 11 12月 2007 → 14 12月 2007

出版系列

名字	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007
國家/地區	Morocco
城市	Marrakech
期間	11/12/07 → 14/12/07

存取文件

10.1109/ICECS.2007.4510966

其它文件與鏈接

Link to publication in Scopus

引用此

Wang, T. M., Shen, W. Y., & Ker, M-D. (2007). A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. 於 ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems (頁 206-209). Article 4510966 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2007.4510966

@inproceedings{92fa54e3f09c44c29ce9ed7ce3ecb502,

title = "A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes",

abstract = "A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.",

author = "Wang, {Tzu Ming} and Shen, {Wan Yi} and Ming-Dou Ker",

year = "2007",

month = dec,

day = "1",

doi = "10.1109/ICECS.2007.4510966",

language = "English",

isbn = "1424413788",

series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",

pages = "206--209",

booktitle = "ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems",

note = "14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007 ; Conference date: 11-12-2007 Through 14-12-2007",

}

Wang, TM, Shen, WY & Ker, M-D 2007, A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. 於 ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems., 4510966, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, 頁 206-209, 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007, Marrakech, Morocco, 11/12/07. https://doi.org/10.1109/ICECS.2007.4510966

A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. / Wang, Tzu Ming; Shen, Wan Yi; Ker, Ming-Dou.
ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 206-209 4510966 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

研究成果: Conference contribution › 同行評審

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AU - Wang, Tzu Ming

AU - Shen, Wan Yi

AU - Ker, Ming-Dou

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N2 - A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.

AB - A new architecture of charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes is proposed, which is composed of two identical pumping branches and four-phase clock signals. The four-phase clock signals are designed to have no undesirable return-back leakage path during clock transition and to control the charge transfer MOSFET switches in the proposed circuit to be turned on and off completely. Therefore, its pumping efficiency is higher than that of the conventional one. Because the gate-to-source and gate-to-drain voltages of all devices in the new proposed charge pump circuit do not exceed the normal power supply voltage (VDD), the new proposed charge pump circuit is suitable for applications in low-voltage CMOS processes.

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T3 - Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

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BT - ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems

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Wang TM, Shen WY, Ker M-D. A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes. 於 ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 206-209. 4510966. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). doi: 10.1109/ICECS.2007.4510966

A new architecture for charge pump circuit without suffering gate-oxide reliability in low-voltage CMOS processes

摘要

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Conference

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