A new analog implementation of the Kohonen neural network

Chung-Yu Wu, Wen Kai Kuo

    研究成果: Conference contribution同行評審

    5 引文 斯高帕斯(Scopus)

    摘要

    In this paper, a new circuit implementation of the Kohonen neural networks is proposed. A novel winner-take-all circuit is developed and digital counters are used to store and update the weights. An experimental chip of this system has been fabricated by 1.2um CMOS technology. A architecture is also proposed for these chips to be combined together to form a larger net.

    原文English
    主出版物標題1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Proceedings of Technical Papers
    發行者Institute of Electrical and Electronics Engineers Inc.
    頁面262-266
    頁數5
    ISBN(電子)0780309782
    DOIs
    出版狀態Published - 1 一月 1993
    事件1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993 - Taipei, Taiwan
    持續時間: 12 五月 199314 五月 1993

    出版系列

    名字International Symposium on VLSI Technology, Systems, and Applications, Proceedings
    ISSN(列印)1930-8868

    Conference

    Conference1993 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA 1993
    國家/地區Taiwan
    城市Taipei
    期間12/05/9314/05/93

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