摘要
This paper proposes a new 8T nonvolatile SRAM (nvSRAM) cell employing ULP FinFETs and ferroelectric FinFETs to enable energy-efficient and low-latency store/recall operations. Different from other types of nvSRAM requiring additional circuitry or nonvolatile memories connected to a standard 6T SRAM cell to achieve nonvolatility, the proposed hybrid nvSRAM cell reduces the area penalty by embedding the nonvolatile ferroelectric FinFETs in a 6T SRAM cell without sacrificing the cell stability, read/write performance and power consumption.
原文 | English |
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文章編號 | 8986584 |
頁(從 - 到) | 171-175 |
頁數 | 5 |
期刊 | IEEE Journal of the Electron Devices Society |
卷 | 8 |
發行號 | 1 |
DOIs | |
出版狀態 | Published - 7 2月 2020 |