A new 2-D 8×8 DCT/IDCT core design using group distributed arithmetic

This paper presents a new two-dimensional (2-D) 8×8 discrete cosine/inverse discrete cosine transform (DCT/IDCT) core design using the group distributed arithmetic (GDA) approach. We adopt the way of DA computation and exploit the good features of the cyclic convolution to facilitate an efficient realization of 2-D 8×8 DCT/IDCT core design using shared ROM modules, barrier shifters, and accumulators. To increase the ROM utilization, we re-arrange the content of ROM into several groups in which all the elements in a group will be accessed simultaneously in accumulating the DCT/IDCT outputs. The comparison results with the existing designs show that the proposed design possesses averagely 62.6 % reduction in the delay-area products (ns*Kμm²) based on a 0.35μm CMOS technology.