摘要
This paper presents a real-time resizing IC that can dynamically reconfigure the multiplierless polyphase CIC (cascaded-integer-comb) filter modules to meet even non-integer resizing ratio. The hardware cost is greatly reduced by using overlap-save based block input and concurrent register reset scheme. The simulated results show that this chip can process, four 320×200 30 frames/sec at 55 MHz clock.
原文 | English |
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頁(從 - 到) | 826-832 |
頁數 | 7 |
期刊 | IEEE Transactions on Consumer Electronics |
卷 | 43 |
發行號 | 3 |
DOIs | |
出版狀態 | Published - 1 12月 1997 |