A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects

Shih An Yu*, Pei Yu Huang, Yu-Min Lee

*此作品的通信作者

研究成果: Conference contribution同行評審

11 引文 斯高帕斯(Scopus)

摘要

In this paper, a grid-based multiple supply voltage(MSV) assignment method is presented to statistically minimize the total power consumption of 3-D IC. This method consists of a statistical electro-thermal simulator to get the mean and variance of on-chip, a thermal-aware statistical static timing analysis(SSTA) to take into account the thermal effect on circuit timing, the statistical power-delayjsensitivity-slack product to be the optimization criterion, and an incremental update of statistical timing to save the runtime. The experimental results demonstrate the effectiveness of the developed methodology and indicate that the consideration of the thermal effect in the circuit simulation is imperative.

原文English
主出版物標題Proceedings of the ASP-DAC 2009
主出版物子標題Asia and South Pacific Design Automation Conference 2009
頁面55-60
頁數6
DOIs
出版狀態Published - 20 四月 2009
事件Asia and South Pacific Design Automation Conference 2009, ASP-DAC 2009 - Yokohama, Japan
持續時間: 19 一月 200922 一月 2009

出版系列

名字Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

ConferenceAsia and South Pacific Design Automation Conference 2009, ASP-DAC 2009
國家/地區Japan
城市Yokohama
期間19/01/0922/01/09

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