A multi-axis readout circuit using in female ovulation monitoring platform

Hsin Yi Yu; Kelvin Yi Tse Lai; Hsie-Chia Chang; Chen-Yi Lee

doi:10.1109/VLSI-DAT.2016.7482544

A multi-axis readout circuit using in female ovulation monitoring platform

Hsin Yi Yu, Kelvin Yi Tse Lai, Hsie-Chia Chang, Chen-Yi Lee

電子研究所

研究成果: Conference contribution › 同行評審

1 引文斯高帕斯（Scopus）

摘要

In this paper, an energy-efficient monitor, including three capacitive and two resistive readout circuits with hardware-sharing architecture, is presented for female ovulation. The proposed design is featuring two calibration modules: one decreases the initial offset by capacitor array, and the other reduces P-V-T variations by taking proportion between sensing and ruler results. After implemented in UMC 0.18μm CMOS-MEMS technology, the post-layout simulation results show that our circuit consumes 30μW and 49μW in 0.8ms conversion time under 1.8V supplied voltage for 1-axis and 3-axis. The capacitive resolution is around 0.1fF and the sensing range of die-temperature is 0~100°C with 0.05°C resolution.

原文	English
主出版物標題	2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016
發行者	Institute of Electrical and Electronics Engineers Inc.
ISBN（電子）	9781467394987
DOIs	https://doi.org/10.1109/VLSI-DAT.2016.7482544
出版狀態	Published - 31 5月 2016
事件	2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 - Hsinchu, Taiwan 持續時間: 25 4月 2016 → 27 4月 2016

出版系列

名字	2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016

Conference

Conference	2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016
國家/地區	Taiwan
城市	Hsinchu
期間	25/04/16 → 27/04/16

存取文件

10.1109/VLSI-DAT.2016.7482544

其它文件與鏈接

Link to publication in Scopus

引用此

Yu, H. Y., Lai, K. Y. T., Chang, H-C., & Lee, C-Y. (2016). A multi-axis readout circuit using in female ovulation monitoring platform. 於 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 Article 7482544 (2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2016.7482544

@inproceedings{1088799722ce4b599a0f180e56d9212f,

title = "A multi-axis readout circuit using in female ovulation monitoring platform",

abstract = "In this paper, an energy-efficient monitor, including three capacitive and two resistive readout circuits with hardware-sharing architecture, is presented for female ovulation. The proposed design is featuring two calibration modules: one decreases the initial offset by capacitor array, and the other reduces P-V-T variations by taking proportion between sensing and ruler results. After implemented in UMC 0.18μm CMOS-MEMS technology, the post-layout simulation results show that our circuit consumes 30μW and 49μW in 0.8ms conversion time under 1.8V supplied voltage for 1-axis and 3-axis. The capacitive resolution is around 0.1fF and the sensing range of die-temperature is 0~100°C with 0.05°C resolution.",

keywords = "Capacitive and Resistive Readout Circuits, Female Ovulation Monitoring Platform, Time-to-Digital Converter",

author = "Yu, {Hsin Yi} and Lai, {Kelvin Yi Tse} and Hsie-Chia Chang and Chen-Yi Lee",

year = "2016",

month = may,

day = "31",

doi = "10.1109/VLSI-DAT.2016.7482544",

language = "English",

series = "2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016",

address = "United States",

note = "2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 ; Conference date: 25-04-2016 Through 27-04-2016",

}

Yu, HY, Lai, KYT, Chang, H-C & Lee, C-Y 2016, A multi-axis readout circuit using in female ovulation monitoring platform. 於 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016., 7482544, 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016, Institute of Electrical and Electronics Engineers Inc., 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016, Hsinchu, Taiwan, 25/04/16. https://doi.org/10.1109/VLSI-DAT.2016.7482544

A multi-axis readout circuit using in female ovulation monitoring platform. / Yu, Hsin Yi; Lai, Kelvin Yi Tse; Chang, Hsie-Chia 等.
2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7482544 (2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - A multi-axis readout circuit using in female ovulation monitoring platform

AU - Yu, Hsin Yi

AU - Lai, Kelvin Yi Tse

AU - Chang, Hsie-Chia

AU - Lee, Chen-Yi

PY - 2016/5/31

Y1 - 2016/5/31

N2 - In this paper, an energy-efficient monitor, including three capacitive and two resistive readout circuits with hardware-sharing architecture, is presented for female ovulation. The proposed design is featuring two calibration modules: one decreases the initial offset by capacitor array, and the other reduces P-V-T variations by taking proportion between sensing and ruler results. After implemented in UMC 0.18μm CMOS-MEMS technology, the post-layout simulation results show that our circuit consumes 30μW and 49μW in 0.8ms conversion time under 1.8V supplied voltage for 1-axis and 3-axis. The capacitive resolution is around 0.1fF and the sensing range of die-temperature is 0~100°C with 0.05°C resolution.

AB - In this paper, an energy-efficient monitor, including three capacitive and two resistive readout circuits with hardware-sharing architecture, is presented for female ovulation. The proposed design is featuring two calibration modules: one decreases the initial offset by capacitor array, and the other reduces P-V-T variations by taking proportion between sensing and ruler results. After implemented in UMC 0.18μm CMOS-MEMS technology, the post-layout simulation results show that our circuit consumes 30μW and 49μW in 0.8ms conversion time under 1.8V supplied voltage for 1-axis and 3-axis. The capacitive resolution is around 0.1fF and the sensing range of die-temperature is 0~100°C with 0.05°C resolution.

KW - Capacitive and Resistive Readout Circuits

KW - Female Ovulation Monitoring Platform

KW - Time-to-Digital Converter

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M3 - Conference contribution

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T3 - 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016

BT - 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016

PB - Institute of Electrical and Electronics Engineers Inc.

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Yu HY, Lai KYT, Chang H-C , Lee C-Y. A multi-axis readout circuit using in female ovulation monitoring platform. 於 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016. Institute of Electrical and Electronics Engineers Inc. 2016. 7482544. (2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016). doi: 10.1109/VLSI-DAT.2016.7482544

A multi-axis readout circuit using in female ovulation monitoring platform

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Conference

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指紋

引用此