A mismatch compensation circuit for CMOS quadrature VCO phase error

Han Jian Lee; Che Sheng Chen; Wen Shen Wuen; Kuei-Ann Wen

doi:10.1109/ISSSE.2007.4294522

A mismatch compensation circuit for CMOS quadrature VCO phase error

Han Jian Lee^*, Che Sheng Chen, Wen Shen Wuen, Kuei-Ann Wen

^*此作品的通信作者

研究成果: Conference contribution › 同行評審

6 引文斯高帕斯（Scopus）

摘要

This paper presents an analysis of phase errors in LC quadrature VCO with a common-mode model. A mismatch compensation circuit is proposed to alleviate phase errors due to common-mode transconductance mismatch. With the compensation circuit, quardature phase errors and image rejection ration rate (IRR) are improved about 1.5 degrees and 4.7dB, respectively. The compensation circuit consumes 1.1mW.

原文	English
主出版物標題	2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007
頁面	497-500
頁數	4
DOIs	https://doi.org/10.1109/ISSSE.2007.4294522
出版狀態	Published - 1 12月 2007
事件	2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007 - Montreal, QC, Canada 持續時間: 30 7月 2007 → 2 8月 2007

出版系列

名字	Conference Proceedings of the International Symposium on Signals, Systems and Electronics

Conference

Conference	2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007
國家/地區	Canada
城市	Montreal, QC
期間	30/07/07 → 2/08/07

存取文件

10.1109/ISSSE.2007.4294522

其它文件與鏈接

Link to publication in Scopus

引用此

Lee, H. J., Chen, C. S., Wuen, W. S., & Wen, K-A. (2007). A mismatch compensation circuit for CMOS quadrature VCO phase error. 於 2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007 (頁 497-500). [4294522] (Conference Proceedings of the International Symposium on Signals, Systems and Electronics). https://doi.org/10.1109/ISSSE.2007.4294522

@inproceedings{fbd1220b1af540ebb1165371180d159f,

title = "A mismatch compensation circuit for CMOS quadrature VCO phase error",

abstract = "This paper presents an analysis of phase errors in LC quadrature VCO with a common-mode model. A mismatch compensation circuit is proposed to alleviate phase errors due to common-mode transconductance mismatch. With the compensation circuit, quardature phase errors and image rejection ration rate (IRR) are improved about 1.5 degrees and 4.7dB, respectively. The compensation circuit consumes 1.1mW.",

keywords = "Compensation, Quadrature phase error, Voltage controlled oscillators",

author = "Lee, {Han Jian} and Chen, {Che Sheng} and Wuen, {Wen Shen} and Kuei-Ann Wen",

year = "2007",

month = dec,

day = "1",

doi = "10.1109/ISSSE.2007.4294522",

language = "English",

isbn = "1424414490",

series = "Conference Proceedings of the International Symposium on Signals, Systems and Electronics",

pages = "497--500",

booktitle = "2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007",

note = "null ; Conference date: 30-07-2007 Through 02-08-2007",

}

Lee, HJ, Chen, CS, Wuen, WS & Wen, K-A 2007, A mismatch compensation circuit for CMOS quadrature VCO phase error. 於 2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007., 4294522, Conference Proceedings of the International Symposium on Signals, Systems and Electronics, 頁 497-500, 2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007, Montreal, QC, Canada, 30/07/07. https://doi.org/10.1109/ISSSE.2007.4294522

A mismatch compensation circuit for CMOS quadrature VCO phase error. / Lee, Han Jian; Chen, Che Sheng; Wuen, Wen Shen 等.

2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007. 2007. p. 497-500 4294522 (Conference Proceedings of the International Symposium on Signals, Systems and Electronics).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - A mismatch compensation circuit for CMOS quadrature VCO phase error

AU - Lee, Han Jian

AU - Chen, Che Sheng

AU - Wuen, Wen Shen

AU - Wen, Kuei-Ann

PY - 2007/12/1

Y1 - 2007/12/1

N2 - This paper presents an analysis of phase errors in LC quadrature VCO with a common-mode model. A mismatch compensation circuit is proposed to alleviate phase errors due to common-mode transconductance mismatch. With the compensation circuit, quardature phase errors and image rejection ration rate (IRR) are improved about 1.5 degrees and 4.7dB, respectively. The compensation circuit consumes 1.1mW.

AB - This paper presents an analysis of phase errors in LC quadrature VCO with a common-mode model. A mismatch compensation circuit is proposed to alleviate phase errors due to common-mode transconductance mismatch. With the compensation circuit, quardature phase errors and image rejection ration rate (IRR) are improved about 1.5 degrees and 4.7dB, respectively. The compensation circuit consumes 1.1mW.

KW - Compensation

KW - Quadrature phase error

KW - Voltage controlled oscillators

UR - http://www.scopus.com/inward/record.url?scp=47349128686&partnerID=8YFLogxK

U2 - 10.1109/ISSSE.2007.4294522

DO - 10.1109/ISSSE.2007.4294522

M3 - Conference contribution

AN - SCOPUS:47349128686

SN - 1424414490

SN - 9781424414499

T3 - Conference Proceedings of the International Symposium on Signals, Systems and Electronics

SP - 497

EP - 500

BT - 2007 International Symposium on Signals, Systems, and Electronics, URSI ISSSE 2007

Y2 - 30 July 2007 through 2 August 2007

ER -

A mismatch compensation circuit for CMOS quadrature VCO phase error

摘要

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Conference

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