A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect

Yong Yu Lin; Fan Ta Chen; Wei-Zen Chen

doi:10.1109/VLSI-DAT49148.2020.9196262

A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect

Yong Yu Lin, Fan Ta Chen, Wei-Zen Chen

電子研究所

研究成果: Conference contribution › 同行評審

3 引文斯高帕斯（Scopus）

摘要

A millimeter-wave (mmW) frequency synthesizer for 60GHz wireless transceiver is presented. To achieve wide range and low noise operation, a new sampling PD based PLL (S-PLL) is proposed. In contrast to conventional sub-sampling PD based PLLs, it provides a wider capture range without suffering from harmonic lock problems. Also, compared to conventional CP-based PLLs, the inband noise is improved by 13 dB while the reference spur is improved by more than 16 dB. Implemented in TSMC 28nm CMOS technology, the core circuit occupies a chip area of 0.175mm2. The measured phase noise from a 48 GHz carrier is-95.7dBc/Hz at 1MHz offset. The power consumption is 54mW.

原文	English
主出版物標題	2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020
發行者	Institute of Electrical and Electronics Engineers Inc.
頁數	2
ISBN（電子）	9781728160832
DOIs	https://doi.org/10.1109/VLSI-DAT49148.2020.9196262
出版狀態	Published - 8月 2020
事件	2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 - Hsinchu, Taiwan 持續時間: 10 8月 2020 → 13 8月 2020

出版系列

名字	2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020

Conference

Conference	2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020
國家/地區	Taiwan
城市	Hsinchu
期間	10/08/20 → 13/08/20

存取文件

10.1109/VLSI-DAT49148.2020.9196262

其它文件與鏈接

Link to publication in Scopus

引用此

Lin, Y. Y., Chen, F. T., & Chen, W.-Z. (2020). A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect. 於 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 文章 9196262 (2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT49148.2020.9196262

@inproceedings{71f1bd92d281439abd4066a8efa883a1,

title = "A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect",

abstract = "A millimeter-wave (mmW) frequency synthesizer for 60GHz wireless transceiver is presented. To achieve wide range and low noise operation, a new sampling PD based PLL (S-PLL) is proposed. In contrast to conventional sub-sampling PD based PLLs, it provides a wider capture range without suffering from harmonic lock problems. Also, compared to conventional CP-based PLLs, the inband noise is improved by 13 dB while the reference spur is improved by more than 16 dB. Implemented in TSMC 28nm CMOS technology, the core circuit occupies a chip area of 0.175mm2. The measured phase noise from a 48 GHz carrier is-95.7dBc/Hz at 1MHz offset. The power consumption is 54mW. ",

keywords = "Charge Pump Phase-locked Loop (CP-PLL), Sampling-PD PLL (S-PLL)., Sub-Sampling-PD PLL (SSPLL)",

author = "Lin, {Yong Yu} and Chen, {Fan Ta} and Wei-Zen Chen",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020 ; Conference date: 10-08-2020 Through 13-08-2020",

year = "2020",

month = aug,

doi = "10.1109/VLSI-DAT49148.2020.9196262",

language = "English",

series = "2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020",

address = "United States",

}

Lin, YY, Chen, FT & Chen, W-Z 2020, A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect. 於 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020., 9196262, 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Institute of Electrical and Electronics Engineers Inc., 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, 10/08/20. https://doi.org/10.1109/VLSI-DAT49148.2020.9196262

A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect. / Lin, Yong Yu; Chen, Fan Ta; Chen, Wei-Zen.
2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020. Institute of Electrical and Electronics Engineers Inc., 2020. 9196262 (2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020).

研究成果: Conference contribution › 同行評審

TY - GEN

T1 - A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect

AU - Lin, Yong Yu

AU - Chen, Fan Ta

AU - Chen, Wei-Zen

PY - 2020/8

Y1 - 2020/8

N2 - A millimeter-wave (mmW) frequency synthesizer for 60GHz wireless transceiver is presented. To achieve wide range and low noise operation, a new sampling PD based PLL (S-PLL) is proposed. In contrast to conventional sub-sampling PD based PLLs, it provides a wider capture range without suffering from harmonic lock problems. Also, compared to conventional CP-based PLLs, the inband noise is improved by 13 dB while the reference spur is improved by more than 16 dB. Implemented in TSMC 28nm CMOS technology, the core circuit occupies a chip area of 0.175mm2. The measured phase noise from a 48 GHz carrier is-95.7dBc/Hz at 1MHz offset. The power consumption is 54mW.

AB - A millimeter-wave (mmW) frequency synthesizer for 60GHz wireless transceiver is presented. To achieve wide range and low noise operation, a new sampling PD based PLL (S-PLL) is proposed. In contrast to conventional sub-sampling PD based PLLs, it provides a wider capture range without suffering from harmonic lock problems. Also, compared to conventional CP-based PLLs, the inband noise is improved by 13 dB while the reference spur is improved by more than 16 dB. Implemented in TSMC 28nm CMOS technology, the core circuit occupies a chip area of 0.175mm2. The measured phase noise from a 48 GHz carrier is-95.7dBc/Hz at 1MHz offset. The power consumption is 54mW.

KW - Charge Pump Phase-locked Loop (CP-PLL)

KW - Sampling-PD PLL (S-PLL).

KW - Sub-Sampling-PD PLL (SSPLL)

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U2 - 10.1109/VLSI-DAT49148.2020.9196262

DO - 10.1109/VLSI-DAT49148.2020.9196262

M3 - Conference contribution

T3 - 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020

BT - 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020

Y2 - 10 August 2020 through 13 August 2020

ER -

Lin YY, Chen FT, Chen WZ. A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect. 於 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020. Institute of Electrical and Electronics Engineers Inc. 2020. 9196262. (2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020). doi: 10.1109/VLSI-DAT49148.2020.9196262

A Millimeter-Wave Frequency Synthesizer for 60 GHz Wireless Interconnect

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Conference

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