A low supply noise content-sensitive ROM architecture for SoC

Meng Fan Chang*, Lih Yih Chiou, Kuei-Ann Wen

*此作品的通信作者

    研究成果: Paper同行評審

    3 引文 斯高帕斯(Scopus)

    摘要

    Supply noise caused by fluctuation of peak current is increasingly important for SoC. This work proposes a content-sensitive architecture to effectively reduce the fluctuation of peak current and lower power consumption of ROMs for various code-patterns and cycles. We achieve both by arranging the data patterns of ROM and by adjusting the bitline structures accordingly. Our experiments on 0.25μm 256K bits ROM macros have shown that the fluctuation of peak current and power consumptions are less than 1.02% of the value using conventional approaches.

    原文English
    頁面1021-1024
    頁數4
    DOIs
    出版狀態Published - 12月 2004
    事件2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan
    持續時間: 6 12月 20049 12月 2004

    Conference

    Conference2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
    國家/地區Taiwan
    城市Tainan
    期間6/12/049/12/04

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