A low-power synchronizer for multistandard wireless communications

Tsung Heng Tsai*, Yi Jen Chen, Chi Fang Li, Guo Hua Pu, Yuan Sun Chu

*此作品的通信作者

研究成果: Article同行評審

摘要

This paper proposes a low-power ASIC design of pseudonoise code synchronization for wireless code-division multiple access (WCDMA), CDMA2000, and IEEE 802.11 g systems. WCDMA and CDMA 2000 are two major standards in third-generation (3G) communication systems. Since 3G and 802.11 g are based on the same CDMA technology, there are common parts in the code synchronization hardware. We integrate the three systems on one ASIC. In addition, we use three kinds of low-power techniques in the design that include power management, absolute weighted magnitude calculation, and spurious power suppression adder. They can save 57.37% power consumption in WCDMA synchronization, 6.06% power consumption in CDMA2000 synchronization, and 84.69% power consumption in 802.11 g synchronization. The low-power synchronizer is implemented with an operating voltage of 1.2 V, 0.13-μm CMOS technology, and chip area of 2.1 × 2.1 mm2.

原文English
頁(從 - 到)826-830
頁數5
期刊IEEE Transactions on Circuits and Systems I: Regular Papers
55
發行號8
DOIs
出版狀態Published - 2008

指紋

深入研究「A low-power synchronizer for multistandard wireless communications」主題。共同形成了獨特的指紋。

引用此