A low power hearing aid computing platform using lightweight processing elements

Kuo Chiang Chang; Yu Wen Chen; Yu Ting Kuo; Chih-Wei Liu

doi:10.1109/ISCAS.2012.6271888

A low power hearing aid computing platform using lightweight processing elements

Kuo Chiang Chang^*, Yu Wen Chen, Yu Ting Kuo, Chih-Wei Liu

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研究成果: Paper › 同行評審

10 引文斯高帕斯（Scopus）

摘要

This paper presents a power-efficient computing platform for hearing aids. The proposed platform composes four heterogeneous processing elements. Each processing element includes one tiny RISC processor and several power-efficient hardwired accelerators. The hardwired accelerators integrate static floating-point and truncated multiplier to improve signal-to-noise ratio and reduce computational complexity. Compared to the post-truncate multiplication in FIR filter, the proposed static floating-point datapath reduces 50.8% area and improves 2.2 dB SNR simultaneously.

原文	English
頁面	2785-2788
頁數	4
DOIs	https://doi.org/10.1109/ISCAS.2012.6271888
出版狀態	Published - 2012
事件	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of 持續時間: 20 5月 2012 → 23 5月 2012

Conference

Conference	2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
國家/地區	Korea, Republic of
城市	Seoul
期間	20/05/12 → 23/05/12

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10.1109/ISCAS.2012.6271888

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引用此

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title = "A low power hearing aid computing platform using lightweight processing elements",

abstract = "This paper presents a power-efficient computing platform for hearing aids. The proposed platform composes four heterogeneous processing elements. Each processing element includes one tiny RISC processor and several power-efficient hardwired accelerators. The hardwired accelerators integrate static floating-point and truncated multiplier to improve signal-to-noise ratio and reduce computational complexity. Compared to the post-truncate multiplication in FIR filter, the proposed static floating-point datapath reduces 50.8% area and improves 2.2 dB SNR simultaneously.",

author = "Chang, {Kuo Chiang} and Chen, {Yu Wen} and Kuo, {Yu Ting} and Chih-Wei Liu",

year = "2012",

doi = "10.1109/ISCAS.2012.6271888",

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note = "2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 ; Conference date: 20-05-2012 Through 23-05-2012",

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AU - Chen, Yu Wen

AU - Kuo, Yu Ting

AU - Liu, Chih-Wei

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AB - This paper presents a power-efficient computing platform for hearing aids. The proposed platform composes four heterogeneous processing elements. Each processing element includes one tiny RISC processor and several power-efficient hardwired accelerators. The hardwired accelerators integrate static floating-point and truncated multiplier to improve signal-to-noise ratio and reduce computational complexity. Compared to the post-truncate multiplication in FIR filter, the proposed static floating-point datapath reduces 50.8% area and improves 2.2 dB SNR simultaneously.

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DO - 10.1109/ISCAS.2012.6271888

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T2 - 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012

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ER -

A low power hearing aid computing platform using lightweight processing elements

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