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A low power differential cascode voltage switch with pass gate pulsed latch for viterbi decoder
Po-Tsang Huang
, Xin Ru Lee,
Hsie-Chia Chang
,
Chen-Yi Lee
, Wei Hwang
*
*
此作品的通信作者
國際半導體產業學院
研究成果
:
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同行評審
1
引文 斯高帕斯(Scopus)
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Keyphrases
90-nm CMOS Technology
12%
Cell Library
12%
Circuit Techniques
12%
Differential Cascode Voltage Switch
100%
Edge Triggered
12%
Energy Consumption Reduction
12%
Energy Efficient Latches
12%
Flip-flop
37%
Gate Circuit
12%
High Energy Efficiency
12%
High Performance
12%
Leakage Power
12%
Low Power
100%
Low Power Consumption
12%
Low-swing
37%
Pass Gate
100%
Power Cell
12%
Power Differential
100%
Pulse Generator
37%
Pulsed Latch
100%
Switching Energy
12%
Transistor
12%
Transparency Window
12%
Viterbi Decoder
100%
Engineering
Energy Engineering
12%
Flip Flop Circuits
37%
Gate Circuit
12%
Gate Latch
37%
High Energy Efficiency
12%
Low Power Consumption
12%
Pulse Generator
37%
Reduce Power Consumption
12%
Simulation Result
12%
Switch Voltage
100%
Transparent Window
12%
Computer Science
Energy Efficiency
33%
Energy Efficient
33%
Low Power Consumption
33%
Pulse Generator
100%
Reduce Power Consumption
33%