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A low power configurable SoC for simulating delay-based audio effects
Ling Liu
*
, Jeremia Bar
, Felix Friedrich
, Jurg Gutknecht
,
Shiao-Li Tsao
*
此作品的通信作者
資訊工程學系
研究成果
:
Conference contribution
›
同行評審
3
引文 斯高帕斯(Scopus)
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Keyphrases
Low Power
100%
On-a-chip
100%
System Architecture
100%
Audio Effects
100%
Hardware-software Co-design
100%
Delay-based
100%
Co-design Method
100%
Configurable Systems
100%
Rapid Growth
50%
Single chip
50%
Audio
50%
Power Efficient
50%
System Size
50%
Computation-intensive
50%
System Energy
50%
Power Performance
50%
Dedicated Hardware
50%
System Cost
50%
Power Cost
50%
Reliable System
50%
FPGA System
50%
Data Throughput
50%
Delay Effects
50%
Reduced System
50%
Complete System
50%
Dynamic Power Consumption
50%
FPGA Device
50%
Data User
50%
Partition System
50%
User Flexibility
50%
Dedicated Software
50%
Computer Science
System on a Chip
100%
Participatory Design
100%
Configurable System
100%
Field Programmable Gate Arrays
100%
Computer Hardware
100%
System Architecture
100%
Power Efficient
50%
Throughput Data
50%
Intensive Computation
50%
single-chip
50%
User Data
50%
Dedicated Hardware
50%
System Partition
50%
Dynamic Power Consumption
50%
Engineering
Field Programmable Gate Arrays
100%
Electric Power Utilization
50%
Single Chip
50%
Great Deal
50%
Reliable Performance
50%
Power Engineering
50%
Complete System
50%